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#ifndef VM_SPARC_H
#define VM_SPARC_H

/* integer regs */
#define G0	0
#define G1	1
#define G2	2
#define G3	3
#define G4	4
#define G5	5
#define G6	6
#define G7	7
#define O0	8
#define O1	9
#define O2	10
#define O3	11
#define O4	12
#define O5	13
#define O6	14
#define O7	15
#define L0	16
#define L1	17
#define L2	18
#define L3	19
#define L4	20
#define L5	21
#define L6	22
#define L7	23
#define I0	24
#define I1	25
#define I2	26
#define I3	27
#define I4	28
#define I5	29
#define I6	30
#define I7	31

/* float regs */
#define F0	0
#define F1	1
#define F2	2
#define F3	3
#define F4	4
#define F5	5
#define F6	6
#define F7	7
#define F8	8
#define F9	9
#define F10	10
#define F11	11
#define F12	12
#define F13	13
#define F14	14
#define F15	15
#define F16	16
#define F17	17
#define F18	18
#define F19	19
#define F20	20
#define F21	21
#define F22	22
#define F23	23
#define F24	24
#define F25	25
#define F26	26
#define F27	27
#define F28	28
#define F29	29
#define F30	30
#define F31	31

/* state registers */
#define Y_REG		0
#define CCR_REG		2
#define ASI_REG		3
#define FPRS_REG	6

#endif