diff options
| author | Thilo Schulz <arny@ats.s.bawue.de> | 2011-09-27 14:43:20 +0000 |
|---|---|---|
| committer | Tim Angus <tim@ngus.net> | 2013-01-10 23:38:28 +0000 |
| commit | 36154934f5c0472b324f9054bee95af4b9bd94a7 (patch) | |
| tree | 428bd45d0ad764da6c5f7e0a749601ded3d02cd0 /src/asm/snapvector.c | |
| parent | ed1e20af481fd6fdb5dc8d1dc025586e4bf59129 (diff) | |
Set default rounding mode to FE_NEAREST again. Thanks to Matthias Bentrup for providing some explanations.
Diffstat (limited to 'src/asm/snapvector.c')
| -rw-r--r-- | src/asm/snapvector.c | 29 |
1 files changed, 7 insertions, 22 deletions
diff --git a/src/asm/snapvector.c b/src/asm/snapvector.c index 121c110e..a70a1069 100644 --- a/src/asm/snapvector.c +++ b/src/asm/snapvector.c @@ -33,31 +33,21 @@ static unsigned char ssemask[16] __attribute__((aligned(16))) = "\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\xFF\x00\x00\x00\x00" }; -static const unsigned int ssecw __attribute__((aligned(16))) = 0x00001F80; -static const unsigned short fpucw = 0x037F; - void qsnapvectorsse(vec3_t vec) { - uint32_t oldcw __attribute__((aligned(16))); - __asm__ volatile ( - "stmxcsr %3\n" - "ldmxcsr %1\n" - "movaps (%0), %%xmm1\n" - "movups (%2), %%xmm0\n" + "movups (%1), %%xmm0\n" "movaps %%xmm0, %%xmm2\n" "andps %%xmm1, %%xmm0\n" "andnps %%xmm2, %%xmm1\n" "cvtps2dq %%xmm0, %%xmm0\n" "cvtdq2ps %%xmm0, %%xmm0\n" "orps %%xmm1, %%xmm0\n" - "movups %%xmm0, (%2)\n" - - "ldmxcsr %3\n" + "movups %%xmm0, (%1)\n" : - : "r" (ssemask), "m" (ssecw), "r" (vec), "m" (oldcw) + : "r" (ssemask), "r" (vec) : "memory", "%xmm0", "%xmm1", "%xmm2" ); @@ -73,16 +63,11 @@ void qsnapvectorx87(vec3_t vec) { __asm__ volatile ( - "sub $2, " ESP "\n" - "fnstcw (" ESP ")\n" - "fldcw %0\n" - QROUNDX87("(%1)") - QROUNDX87("4(%1)") - QROUNDX87("8(%1)") - "fldcw (" ESP ")\n" - "add $2, " ESP "\n" + QROUNDX87("(%0)") + QROUNDX87("4(%0)") + QROUNDX87("8(%0)") : - : "m" (fpucw), "r" (vec) + : "r" (vec) : "memory" ); } |